Offer summary
Qualifications:
BS or MS degree in Electrical Engineering or related field, 3-5 years of experience in hardware design development, Expertise in Verilog, SystemVerilog, VHDL, and SystemC, Proficiency in scripting and verification workflows, Experience with UVM environments and Formal Verification.
Key responsabilities:
- Develop and customize the hardware design platform
- Generate training data for enterprise LLMs
- Translate research team requirements into data insights
- Maintain standards in coding, debugging, and documentation
- Prioritize needs to enhance LLM capabilities